The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC processing and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous one. As integrated circuit manufacturing technology has developed, and VLSI (very large scale integration) has increased the density of features on a wafer, the process of designing the circuits becomes separated from the process of manufacturing them.
In recent years, it has been realized that it is important, at the design stage, to take into account the particularities of the processes that will be used to manufacture the integrated circuits. More particularly, it is desirable to design the integrated circuits so that the various processes involved in manufacturing the devices are optimized, while at the same time ensuring low cost, acceptable product quality, reliability, and safety, etc. This is referred to as applying “design for manufacture” (DFM) techniques or principles. When applying DFM techniques in designing semiconductor integrated circuits, the designer is concerned about how the various aspects of the circuit design affect the yield. Different factors can introduce yield loss and/or device performance. People in charge of manufacturing the ICs could specify design rules that integrated circuit designers must comply with in order to produce a useable final product with good yield. It is within this context the following disclosure arises.